Renesas Electronics /R7FA6T3BB /I3C /STDBR

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Interpret as STDBR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SBRLO0SBRHO0SBRLP0SBRHP0 (0)DSBRPO

DSBRPO=0

Description

Standard Bit Rate Register

Fields

SBRLO

Standard Bit Rate Low-level Period Open-Drain

SBRHO

Standard Bit Rate High-level Period Open-Drain

SBRLP

Standard Bit Rate Low-level Period Push-Pull

SBRHP

Standard Bit Rate High-level Period Push-Pull

DSBRPO

Double the Standard Bit Rate Period for Open-Drain

0 (0): The time period set for SBRHO[7:0] and SBRLO[7:0] is not doubled.

1 (1): The time period set for SBRHO[7:0] and SBRLO[7:0] is doubled.

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